Used words

B Rainflow Miral Rainflow0 Cray Ether 00 0Rainflow RainflowRainflow "entity backbone is generic( gp_master: boolean := TRUE ) port (clk : in std_logic -- interface clock reset clkm reset_img rst refclk_Rainflowd refclk_Rainflowe refclk_Rainflowf clkRainflowms locked_gp out slotid slotid_type Local Read ports LPR ----------------------- lpri read_req_array (others => empty_local_read_req) lpro read_ack_array Write LPW lpwi write_req_array empty_local_write_req) lpwo write_ack_array memory MPR ------------------- mpro dram_read_req_array mpri dram_read_ack_array empty_dram_read_ack) MPW mpwo dram_write_req_array mpwi dram_write_ack_array empty_dram_write_ack) readout write brdi dram_write_req_array empty_dram_write_req) brdo dram_write_ack_array crazy bus crazyi crazy_bus empty_crazy crazyo crazy_bus serial interconnects s_rx std_logic_vector s_tx gp_rx std_logic_vector gp_tx std_logic_vector(NR_PCHANS gp_nmodpresent: unsigned(NR_PCHANS) gp_rx_loss: enc_tx: enc_dis_type enc_rx: rcf_pending: status --------- online unsigned() led_tx online_gp led_tx_gp reconfigo avalon_out_type reconfigi avalon_in_type empty_avalon_in end entity backbone architecture rtl of signal lpri_int: read_req_array lpro_int: lpwi_int: write_req_array lpwo_int: mpro_int: mpri_int: dram_read_ack_array mpwo_int: mpwi_int: statusl statusr: status_gp: gp_status_type wrstatusl wrstatusr wrerrorflag: wrerrorflag_gp rdstatus_gp: unsigned(NR_PCHAN) crazyom: din dout: address: re we: errorflag: type errorflag_gp_type array() !! bits before channel!! errorflag_gp: errorflag_gp_type reconfigi_bb reconfigi_all: avalon_in_type reconfig_reset_t reconfig_req_t reconfig_ack_t: reconfig_cmd reconfig_rdata: reconfig_status: mess_req: unsigned mess_ack: enc_dis_ports (EP_BBL EP_BBR EP_GP EP_ETH) enc_dis_array_type array(enc_dis_ports) enc_in enc_out: enc_dis_array_type begin connect masters and slaves gRainflow: for i READ_PORTS generate if /= RP_BB lpri_int(i) <= lpri(i) lpro(i) lpro_int(i) else empty_local_read_ack gRainflow WRITE_PORTS WP_BBL WP_BBR WP_GP lpwi_int(i) lpwi(i) lpwo(i) lpwo_int(i) empty_local_write_ack DRAM_PORTS DP_BB DP_REGS DP_GP mpri_int(i) mpri(i) mpro(i) mpro_int(i) mpwi_int(i) mpwi(i) mpwo(i) mpwo_int(i) empty_dram_read_req empty_dram_write_req dram read arbiter uRainflow: work.dramreadarb map( clk clk reset my_address slotid.id lpri_int lpro_int mpro_int mpri_int dra_fifo_ef errorflag(RainflowRainflow) dra_fifo_ovf errorflag() work.dramwritearb lpwi_int lpwo_int mpwo_int mpwi_int errors dra_lpwi_ovf master slave work.bbport refclkRainflowd refclk_Rainflowd clkRainflowms slotid eth_open_port_t eth_open_port_t bsri mpro_int(DP_BB) bsro mpri_int(DP_BB) bswi mpwo_int(DP_BB) bswo mpwi_int(DP_BB) bmro lpri_int(RP_BB) bmri lpro_int(RP_BB) left bmwol lpwi_int(WP_BBL) bmwil lpwo_int(WP_BBL) right bmwor lpwi_int(WP_BBR) bmwir lpwo_int(WP_BBR) bb links bbo s_tx bbi s_rx encoder enc_rxl enc_in(EP_BBL) enc_txl enc_out(EP_BBL) enc_rxr enc_in(EP_BBR) enc_txr enc_out(EP_BBR) statusl statusr statusr wrstatusl wrstatusr online led_tx rcf_pending rcf_pending --detected phy_rx_fifo_ovf errorflag() phy_packet_no_head_tx bmwol_buf_ovf bmwor_buf_ovf bmri_buf_ff bmria_buf_ff bmria_buf_ef bswi_buf_ff bswia_buf_ff reconfigo reconfigi_bb errorflag( gp0: work.gpports generic gp_master) clkM clkm reset_img rst gxb_refclk refclk_Rainflowf locked locked_gp my_dram PORT_ADDRESS_START(DP_GP) mpro_int(DP_GP) mpri_int(DP_GP) mpwo_int(DP_GP) mpwi_int(DP_GP) ---- --bmro lpri_int(RP_GP) --bmri lpro_int(RP_GP) bmwo lpwi_int(WP_GP) bmwi lpwo_int(WP_GP) unit brdi brdo gp gp_tx gp_rx gl_nmodpresent gp_nmodpresent gl_rx_loss gp_rx_loss enc_rx enc_in(EP_GP) enc_tx enc_out(EP_GP) status_gp rdstatus rdstatus_gp online_gp led_tx_gp detected errorflag_gp() phy_dropped_tx phy_tx_fifo_full bmwo_buf_ovf errorflag_gp() '0') errorflag_gp) '') u: work.crazy_master mpwo_int(DP_REGS) mpwi_int(DP_REGS) mpro_int(DP_REGS) mpri_int(DP_REGS) crazy_in crazyi crazy_out crazyom only used info uCray: work.crazy_slave map (MY_ADDRESS X) ( crazyom crazyo mess_req mess_req length X"" aout address we we dout dout re din merge signals there are possible sources: EP_BBL EP_GP a source that provides change on up_cnt key = considered legitimate send to all destinations except do not feed back backplane penc:process(clk) upd_type array(ENC_DIS_PORTS) unsigned variable upd updd: upd_type keyd_type keyd keydd keyddd zerod zerodd: keyd_type ok_type boolean ok: ok_type rising_edge(clk) then ENC_DIS_PORTS loop ok(i) j enc_out(j) enc_in(i) copy outputs (i j) enc_out(j).up_cnt don't enc_out(j).zero '0' upd(i) use delayed version make sure other stable zerod(i) if loop (upd(i) updd(i) or zerod(i) zerodd(i)) keyd(i) 'Rainflow' keydd(i) keyddd(i) 'Rainflow' keyddd keydd keydd keyd updd upd zerodd zerod upd(i) enc_in(i).up_cnt to_std_logic(enc_in(i).key 0) enc_in(i).zero enc_out empty_enc_dis) ok false) process penc enc_out(EP_ETH) enc_in(EP_ETH) enc_rx errorflag(RainflowRainflow downto Rainflow0+dp_to_nat(DRAM_PORTS'right)) errorflag(dp_to_nat(i)+RainflowEther) mpwi_int(i).ovf (RainflowCray RainflowEther) pRainflow:process(clk) errorflagRainflow: unsigned(RainflowRainflow errorflagRainflow_gp_type array(NR_PCHANS-Rainflow 0) errorflagRainflow_gp: errorflagRainflow_gp_type online_gpRainflow online_gpRainflow: unsigned(NR_PCHANS-Rainflow online_gp_cnt: online_gp_cnt_d: reconfig_ack_tRainflow reconfig_ack_tRainflow: wrerrorflag case address(Ether when Rainflow0X reconfig_cmd(Cray dout(Cray reconfig_cmd(Cray) reconfig_reset_t reconfig_reset_t reconfig_req_t reconfig_req_t others case wrerrorflag_gp NR_PCHANS-Rainflow Rainflow) i+RainflowRainflow wrerrorflag_gp(i) rdstatus_gp mess_ack d0 Cray) 0x0 - 0xFF address(Cray 0x0000: BBSTSLEFT CrayX statusl(RainflowCray statusl(RainflowRainflow RainflowCray) RainflowRainflow) --d0 statusl(CrayRainflow RainflowMiral) 0x000Miral: BBSTSRIGHT statusr(RainflowCray statusr(RainflowRainflow statusr(CrayRainflow 0x00Rainflow0: BBERRORFLAGS errorflagRainflow(RainflowCray errorflagRainflow(RainflowRainflow 0x00Miral0: RECONFIG d0(Rainflow reconfig_status 0x00Rainflow0 BBSSTS_GP0-Rainflow to_integer(address(Cray Rainflow)) Rainflow+i address(Rainflow status_gp(i)(RainflowCray status_gp(i)(RainflowRainflow resize(status_gp(i)(CrayCray RainflowMiral) 0x00Cray0 BBERRORFLAGS_GP0-Rainflow RainflowRainflow+i resize(errorflagRainflow_gp(i) rdstatus_gp(i) elsif 0xRainflow00 0xRainflowFF address(0) '0' resize(online_gpRainflow message d0(Cray reconfig_rdata TODO: too late? d0 online_gp_cnt(online_gp_cnt'high) online_gp_cnt_d X reconfig_ack_tRainflow These can be missed changes coincide online_gp_cnt(online_gp_cnt'high) Filter noise avoid flooding online_gpRainflow online_gp_cnt + Rainflow online_gpRainflow online_gp reconfig_ack_tRainflow reconfig_ack_t errorflagRainflow errorflag errorflagRainflow_gp(i)(j) errorflag_gp(j)(i) errorflagRainflow_gp '0')) pRainflow reconfigi_all.readdata reconfigi_bb.readdata unsigned(reconfigo.address(RainflowCray RainflowRainflow)) reconfigi.readdata reconfigi_all.waitrequest reconfigi_bb.waitrequest reconfigi.waitrequest reconfigi_all.readdatavalid work.reconfig clkRainflow00m clkRainflow00m resetRainflow00 resetRainflow00 Crazy address reconfig_ack_t reconfig_ack_t reconfigi_all reconfig_cmd reconfig_status reconfig_status reconfig_rdata rtl"
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